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EVG®501

The EVG®501 is a highly flexible wafer bonding system, supporting all common bonding processes, including anodic, glass frit, solder, eutectic, transient liquid phase, and direct bonding. Its easy-access bond chamber and user-friendly tooling design enable quick retooling for different wafer sizes and processes, making it ideal for universities, R&D facilities, and low-volume production. The bond chamber design mirrors that of EVG’s high-volume manufacturing tools, such as the EVG® GEMINI, ensuring seamless scalability. Bonding recipes are easily transferable, enabling smooth transition to larger production volumes as needs grow.

Features:

  • Unique pressure and temperature uniformity
  • Compatible with EVG mechanical and optical aligners
  • Flexible design and configurations for research
  • From single chips to wafers
  • Various processes (eutectic, solder, TLP, direct bonding)
  • Optional turbopump (<1E-5mbar)
  • Upgradeable for anodic bonding
  • Open chamber design for easy conversion and maintenance
  • Pilot production compatible
  • Open chamber design for easy conversion and maintenance
  • Smallest footprint for a 200 mm bonding system: 0.8 m2
  • Recipes are fully compatible with EVG’s high-volume-manufacturing bonding systems

Technical Data:

  • Max contact force
    20 KN
  • Heater Size 
    150 mm - single chips 
    200 mm - 100 mm
  • Vacuum 
    Standard: 0.1 mbar
    Optional: 1E-5 mbar
  • Max temperature: 
    450 °C
  • Single chips processing
    Yes
  • Bond chuck system / Alignment system
    150 mm heater: EVG®610, EVG®620, EVG®6200
    200 mm heater: EVG®6200, SmartView® NT
  • Active Water cooling 
    For bottom side
  • Power supply for anodic bonding
    Max. voltage: 2 kV
    Max. current: 50 mA
  • Loading chamber
    Manual

Applications:

  • MEMS and Sensors: Fabrication of micro-electromechanical systems and sensors.

  • Optical Devices: Production of waveguides and other optical components.

  • 3D Integration: Stacking of chips for 3D integration.

  • Advanced Packaging: Packaging of semiconductor devices.

  • Research and Development: Development of new bonding processes and materials.

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